器件名称: ST2305
功能描述: P Channel Enchancement Mode MOSFET
文件大小: 96.95KB 共6页
简 介:P Channel Enchancement Mode MOSFET -3.5A DESCRIPTION
ST2305
The ST2305 is the P-Channel logic enhancement mode power field effect transistor are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other batter powered circuits, and low in-line power loss are needed in a very small outine surface mount package.
PIN CONFIGURATION SOT-23-3L 3
FEATURE z -10V/-3.5A, RDS(ON) = 50m-ohm @VGS = -4.5V z -10V/-3.0A, RDS(ON) = 70m-ohm @VGS = -2.5V z -10V/-2.0A, RDS(ON)= 105m-ohm @VGS=-1.8V z Super high density cell design for extremely low RDS(ON) z Exceptional on-resistance and maximum DC current capability z SOT-23-3L package design
D G
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1.Gate 2.Source
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3.Drain
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S05YA
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A: Process Code S: Subcontractor Y: Year Code
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA TEL: (650) 9389294 FAX: (650) 9389295
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P Channel Enchancement Mode MOSFET -3.5A
ST2305
ABSOULTE MAXIMUM RATINGS (Ta = 25J Unless otherwise noted ) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ=150J ) TA=25J TA=70J Pulsed Drain Current Continuous Source Current (Diode Conduction) Power Dissipation Operation Junction Temperature Storgae Temperature Range Thermal Resistance-Junction to Ambient TA=25J TA=70J Symbol VDSS VGSS ID IDM IS PD……
