器件名称: PM6344
功能描述: Quad E1 Framer
文件大小: 67.95KB 共2页
简 介:PMC-Sierra,Inc.
PM6344 EQUAD
Supports Line and Path performance monitoring according to ITU recommendations. Accumulators are provided for counting CRC-4 errors, Far-End Block Errors (FEBEs), frame sync errors, and Line Code Violations (LCVs). Extracts the datalink. Extracts selected channels. Provides a 2-frame elastic store buffer for jitter and wander attenuation. timeslot 16 AIS, remote alarm, and remote multiframe alarm. Provides a digital PLL for generation of a low jitter transmit clock. Provides a FIFO buffer for jitter attenuation and transmit rate conversion. FIFO full or empty indication allows for bit-stuffing in higher rate multiplexing applications.
Quad E1 Framer
FEATURES
Monolithic single-chip device which integrates four full-featured E1 framers and transmitters for terminating duplex E1 signals. Frames to a G.704 2.048 Mbit/s signal. Frames to the signalling multiframe and to the CRC multiframe when enabled. Supports HDB3 or AMI line codes. Supports transfer of PCM and signalling data to/from 2.048 Mbit/s or 16.384 Mbit/s backplane buses. Supports n × DS0 backplane interface for fractional E1. Provides Channel-Associated Signalling (CAS) extraction/insertion, programmable idle and digital milliwatt code substitution, and up to three multiframes of signalling debounce on a per-channel basis. Provides trunk conditioning which forces programmable trouble code substitution and signalling conditioning on all/selected channels. Provides an HDLC inter……
