器件名称: PLL701-25SI
功能描述: Low EMI Spread Spectrum Multiplier Clock
文件大小: 205.14KB 共4页
简 介:PLL701-25
Low EMI Spread Spectrum Multiplier Clock
FEATURES
Spread Spectrum clock with frequency range of 33 ~ 90MHz. Output frequency 1X the input frequency. Less than 250 ps skew between outputs. Less than 100 ps cycle - cycle jitter. ± 0.50% Center Spread Modulation (+/-15% tolerance). TTL/CMOS compatible outputs. 3.3V operation. Available in 8-Pin 150mil SOIC.
PIN CONFIGURATION
FIN CLK2 CLK1 GND 1 8 CLK5 CLK4 VDD CLK3
PLL701-25
2 3 4
7 6 5
FIN = 33 ~ 90 Mhz
DESCRIPTION
The PLL701-25 is a Spread Spectrum Clock Generator designed for the purpose of reducing EMI in high-speed digital systems. The device is designed to operate from 33 ~ 90MHz and provides five lowskew outputs.
BLOCK DIAGRAM
CLK1 CLK2 FIN PLL SST 1X CLK3 CLK4 CLK5
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 10/04/05 Page 1
PLL701-25
Low EMI Spread Spectrum Multiplier Clock
PIN DESCRIPTIONS
Name
FIN CLK2 CLK1 GND CLK3 VDD CLK4 CLK5
Number
1 2 3 4 5 6 7 8
Type
I O O I O P O O
Description
Input Clock Frequency. ( 33 ~ 90MHz ) Buffered Clock Output. 1X the input frequency Buffered Clock Output. 1X the input frequency Ground. Buffered Clock Output. 1X the input frequency 3.3V Power Supply. Buffered Clock Output. 1X the input frequency Buffered Clock Output. 1X the input frequency ( FIN ). ( FIN ). ( FIN ). ( FIN ). ( FIN ).
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings PARAMETERS
Supply Voltage Input Voltage, dc Output V……
