器件名称: MSA-0900
功能描述: Cascadable Silicon Bipolar MMIC Amplifier
文件大小: 57.89KB 共4页
简 介:Cascadable Silicon Bipolar MMIC Amplifier Technical Data
MSA-0900
Features
Broadband, Minimum Ripple Cascadable 50 Gain Block 8.0 ± 0.2 dB Typical Gain Flatness from 0.1 to 4.0 GHz 3 dB Bandwidth: 0.1 to 6.0 GHz Low VSWR: ≤ 1.5:1 from 0.1 to 4.0 GHz 11.5 dBm Typical P1dB at 1.0 GHz
The MSA-series is fabricated using HP’s 10 GHz fT, 25 GHz f MAX, silicon bipolar MMIC process which uses nitride self-alignment, ion implantation, and gold metallization to achieve excellent performance, uniformity and reliability. The use of an external bias resistor for temperature and current stability also allows bias flexibility. The recommended assembly procedure is gold-eutectic die attach at 400°C and either wedge or ball bonding using 0.7 mil gold wire. This chip is intended to be used with an external blocking capacitor completing the shunt feedback path (closed loop). Data sheet characterization is given for a 45 pF capacitor. Low frequency performance can be extended by using a larger valued capacitor.[1]
Chip Outline[1]
Description
The MSA-0900 is a high performance silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) chip. This MMIC is designed for very wide bandwidth industrial and military applications that require flat gain and low VSWR.
Note: 1. Refer to the APPLICATIONS section “Silicon MMIC Chip Use” for additional information.
Typical Biasing Configuration
R bias (Required) C Fbl VCC > 12 V
RFC (Optional) 4 C block 3 IN 1
MSA
C block OUT Vd = 7.8 V
2
5……
