器件名称: MSA-0500
功能描述: Cascadable Silicon Bipolar MMIC Amplifier
文件大小: 66.77KB 共4页
简 介:Cascadable Silicon Bipolar MMIC Amplifier Technical Data
MSA-0500
Features
Cascadable 50 Gain Block High Output Power: +23 dBm Typical P1 dB at 1.0 GHz Low Distortion: 33 dBm Typical IP 3 at 1.0 GHz 8.5 dB Typical Gain at 1.0 GHz
The MSA-series is fabricated using HP’s 10 GHz fT, 25 GHz f MAX, silicon bipolar MMIC process which uses nitride self-alignment, ion implantation, and gold metallization to achieve excellent performance, uniformity and reliability. The use of an external bias resistor for temperature and current stability also allows bias flexibility. The recommended assembly procedure is gold-eutectic die attach at 400°C and either wedge or ball bonding using 0.7 mil gold wire. This chip is intended to be used with an external blocking capacitor completing the shunt feedback path (closed loop). Data sheet characterization is given for a
Chip Outline[1]
3 5 2
1
2
The MSA-0500 is a high performance, medium power silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) chip. This MMIC is designed for use as a general purpose 50 gain block. Typical applications include narrow and broad band IF and RF amplifiers in industrial and military systems.
4
45 pF capacitor. Low frequency performance can be extended by using a larger valued capacitor.[1]
Note: 1. See Application Note, AN-S009: “Silicon MMIC Chip Use” for additional information.
Typical Biasing Configuration
R bias (Required) C Fbl VCC > 15 V
RFC (Optional) 4 C block 3 IN 1
MSA
C block OUT V……