器件名称: MSA-0100
功能描述: Cascadable Silicon Bipolar MMIC Amplifier
文件大小: 54.5KB 共4页
简 介:Cascadable Silicon Bipolar MMIC Amplifier Technical Data
MSA-0100
Features
Cascadable 50 Gain Block 3 dB Bandwidth: DC to 1.3 GHz High Gain: 18.5 dB Typical at 0.5 GHz Unconditionally Stable (k>1)
The MSA-series is fabricated using HP’s 10 GHz fT, 25 GHz f MAX, silicon bipolar MMIC process which uses nitride self-alignment, ion implantation, and gold metallization to achieve excellent performance, uniformity and reliability. The use of an external bias resistor for temperature and current stability also allows bias flexibility. The recommended assembly procedure is gold-eutectic die attach at 400°C and either wedge or ball bonding using 0.7 mil gold wire.[1] See APPLICATIONS section, “Chip Use”.
Chip Outline[1]
Description
The MSA-0100 is a high performance silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) chip. This MMIC is designed for use as a general purpose 50 gain block. Typical applications include narrow and broad band IF and RF amplifiers in commercial, industrial and military applications.
Typical Biasing Configuration
R bias VCC > 7 V
Note: 1. This chip contains additional biasing options. The performance specified applies only to the bias option whose bond pads are indicated on the chip outline. Refer to the APPLICATIONS section “Silicon MMIC Chip Use” for additional information.
RFC (Optional) C block IN
MSA
C block OUT Vd = 5 V
5965-9689E
6-242
MSA-0100 Absolute Maximum Ratings
Parameter Device Current Power Dissipation[2,3] RF Inp……