器件名称: P580-35OCL
功能描述: 38MHz-320MHz Low Phase Noise VCXO
文件大小: 178.06KB 共10页
简 介:(Preliminary)
PL580-35/37/38/39
38MHz-320MHz Low Phase Noise VCXO
FEATURES
Less than 0.4ps RMS (12KHz-20MHz) phase jitter for all frequencies . Less than 25ps (typ.) peak to peak jitter for all frequencies. Low phase noise output (@ 1MHz frequency offset -144dBc/Hz for 155.52MHz -140dBC/Hz for 311.04MHz 19MHz-40MHz crystal input. 38MHz-320MHz output. Available in PECL, LVDS, or CMOS outputs. No external varicap required. Output Enable selector. Wide pull range (+/-200ppm). 3.3V operation. Available in 3x3 QFN or 16-pin TSSOP packages.
PACKAGE PIN ASSIGNMENT
VDDANA XIN XOUT SEL2^ OE_CTRL VCON GNDANA LP 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SEL0^ SEL1^ GNDBUF QBAR VDDBUF Q GNDBUF LM
PL580-3X
16-pin TSSOP
VDDANA SEL0^
10
XOUT
12 13 14 15 16 1
11
SEL1^
9
XIN
8 7 6
GNDBUF QBAR VDDBUF Q
DESCRIPTION
The PL580-3X is a monolithic low jitter and low phase noise VCXO, capable of 0.4ps RMS phase jitter and CMOS, LVDS, or PECL outputs, covering a wide frequency output range up to 320MHz. It allows the control of the output frequency with an input voltage (VCON), using a low cost crystal. The frequency selector pads of PL580-3X enable output frequencies of (2, 4, 8, or 16) * F XIN . The PL580-3X is designed to address the demanding requirements of high performance applications such as SONET, GPS, Video, etc.
SEL2^ OE_CTRL VCON
PL580-3X
2 3 4
5
GNDANA
3x3 QFN
Note1: QBAR is used for single ended CMOS output. Note2: ^ Denotes internal pull up resistor.
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