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KGL4215

器件名称: KGL4215
功能描述: 10-Gbps Decision Circuit 0.2
文件大小: 84.59KB    共8页
生产厂商: OKI
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简  介:DATA SHEET O K I G a A s P R O D U C T S KGL4215 10-Gbps Decision Circuit 0.2m Gate Length GaAs MESFET Technology February 2000 s s ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– Oki Semiconductor KGL4215 10-Gbps GaAs Decision Circuit INTRODUCTION Oki Semiconductor’s KGL4215 is a 10-Gbps Decision Circuit with Limiting Amplifier and Flip Flop that is designed for ultra high-speed digital communications systems. The KGL415 uses 0.2-m gate length GaAs MESFET and Oki’s unique MCFF ( Memory Cell type Flip Flop ) technology to achieve operating speeds of 10-Gbps or more. The KGL4215 is available as a 24-pin ceramic packaged device. Due to the KGL4215’s high sensitivity, capacitive coupling is recommended for the IC’s interface. FEATURES High-speed operation: 10-Gbps data rate (min) Low-power dissipation: 600 mW (typ.) using 2-V power-supply 0.2-m gate length GaAs MESFET process MCFF ( Memory Cell type Flip Flop ) technology 24-pin ceramic package APPLICATION High-speed optical communication systems: 10 Gbps High-speed test equipment Oki Semiconductor 1 s KGL4215 s ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– BLOCK DIAGRAM VDD VDD DA 50 DR1 DR2 D C C VDD CK 50 CR QN D MCFF Q Q Q DA CK DR1, CR DR2 Q, QN VDD Data Input Terminal Clock Input Terminal Reference Voltage Terminals. Usually D1R and DR are connected to ground through a capacitor (0.1 F). Reference Voltage Bias Terminal……
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KGL4215 10-Gbps Decision Circuit 0.2 OKI
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