器件名称: FIN3385
功能描述: Low Voltage 28-Bit Flat Panel Display Link Serializers
文件大小: 281.48KB 共9页
简 介:FIN3385 FIN3383 Low Voltage 28-Bit Flat Panel Display Link Serializers
October 2003 Revised January 2004
FIN3385 FIN3383 Low Voltage 28-Bit Flat Panel Display Link Serializers
General Description
The FIN3385 and FIN3383 transform 28 bit wide parallel LVTTL (Low Voltage TTL) data into 4 serial LVDS (Low Voltage Differential Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data steam over a separate LVDS link. Every cycle of transmit clock 28 bits of input LVTTL data are sampled and transmitted. These chipsets are an ideal solution to solve EMI and cable size problems associated with wide and high-speed TTL interfaces.
Features
s Low power consumption s 20 MHz to 85 MHz shift clock support s ±1V common-mode range around 1.2V s Narrow bus reduces cable size and cost s High throughput (up to 2.38 Gbps throughput) s Internal PLL with no external component s Compatible with TIA/EIA-644 specification s Devices are offered in 48- and 56-lead TSSOP packages
Ordering Code:
Order Number FIN3383MTD FIN3385MTD Package Number MTD56 MTD56 Package Description 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
TABLE 1. Display Panel Link Serializers/De-Serializers Chip Matrix Part FIN3385 FIN3383 CLK Frequency 85 66 LVTTL IN 28 28 LVDS OUT 4 4 P……
