器件名称: FDG6318P
功能描述: Dual P-Channel, Digital FET
文件大小: 123.67KB 共5页
简 介:FDG6318P
January 2003
FDG6318P
Dual P-Channel, Digital FET
General Description
These dual P-Channel logic level enhancement mode MOSFET are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETS.
Features
–0.5 A, –20 V. RDS(ON) = 780 m @ VGS = –4.5 V RDS(ON) = 1200 m @ VGS = –2.5 V
Very low level gate drive requirements allowing direct operation in 3V circuits (VGS(th) < 1.5V). Compact industry standard SC70-6 surface mount package
Applications
Battery management
S G D D G
Pin 1
S 1 or 4
6 or 3 D 5 or 2 G 4 or 1 S
G 2 or 5
S
D 3 or 6
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed
TA=25oC unless otherwise noted
Parameter
Ratings
–20 ±12
(Note 1)
Units
V V A W °C
–0.5 –1.8 0.3 –55 to +150
Power Dissipation for Single Operation
(Note 1)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
(Note 1)
415
°C/W
Package Marking and Ordering Information
Device Marking .38 Device FDG6318P Reel Size 7’’ Tape width 8mm Quantity 3000 units
2003 Fairchild Semiconductor Corporation
FDG6318P Rev C (W)
FDG6318P
Electri……
