器件名称: IZ74HC174A
功能描述: Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS
文件大小: 51.75KB 共6页
简 介:TECHNICAL DATA
IN74HC174A
Hex D Flip-Flop with Common Clock and Reset
High-Performance Silicon-Gate CMOS
The IN74HC174A is identical in pinout to the LS/ALS174. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of six D flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-to-high transition of the Clock input. Reset is asynchronous and active-low. Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 A High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION IN74HC174AN Plastic IN74HC174AD SOIC IZ74HC174A Chip TA = -55° to 125° C for all packages
PIN ASSIGNMENT LOGIC DIAGRAM
FUNCTION TABLE
Inputs Reset L PIN 16=VCC PIN 8 = GND H H H H X = Don’t care L = LOW voltage level H = HIGH voltage level L Clock X D X H L X X Output Q L H L no change no change
INTEGRAL
1
IN74HC174A
MAXIMUM RATINGS *
Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1,5 mm from Case for 4 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 ±20 ±25 ±50 75……
